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Generation Report - NCO Compiler MegaCore Function v2.3.1

Entity Namenco231_st
Variation Namenco231
Variation HDLVerilog HDL
Output DirectoryC:\Documents and Settings\user\®à­±\DE2_ADA

File Summary

IP Toolbench is creating the following files in the output directory:
FileDescription
nco231.vA MegaCore® function variation file, which defines a Verilog HDL top-level description of the custom MegaCore function. Instantiate the entity defined by this file inside of your design. Include this file when compiling your design in the Quartus II software.
nco231_bb.vVerilog HDL black-box file for the MegaCore function variation. Use this file when using a third-party EDA tool to synthesize your design.
nco231.bsfQuartus® II symbol file for the MegaCore function variation. You can use this file in the Quartus II block diagram editor.
nco231.voVerilog HDL IP functional simulation model.
nco231_st.vGenerated NCO synthesizable netlist. This file is required for Quartus II synthesis. It will be added to your Quartus II project
nco231_tb.vVerilog HDL Testbench
nco231_vo_msim.tclModelsim TCL Script to run the Verilog HDL IP Functional Simulation model and generated Verilog HDL testbench in the Modelsim simulation software
nco231_wave.doModelsim Waveform File
nco231_model.mMatlab m-file describing a Matlab bit-accurate model.
nco231_tb.mMatlab Testbench
nco231_sin_f.hexIntel Hex-format ROM initialization file.
nco231_cos_f.hexIntel Hex-format ROM initialization file.
nco231_sin_c.hexIntel Hex-format ROM initialization file.
nco231_cos_c.hexIntel Hex-format ROM initialization file.
nco231.vecQuartus Vector File.
nco231.htmlThe MegaCore function report file.

MegaCore Function Variation File Ports

NameDirectionWidth
phi_inc_iINPUT32
fsin_oOUTPUT13
fcos_oOUTPUT13
clkINPUT1
resetINPUT1
clkenINPUT1
data_readyOUTPUT1