// --------------------------------------------------------------------
// Copyright (c) 2007 by Terasic Technologies Inc. 
// --------------------------------------------------------------------
//
// Permission:
//
//   Terasic grants permission to use and modify this code for use
//   in synthesis for all Terasic Development Boards and Altera Development 
//   Kits made by Terasic.  Other use of this code, including the selling 
//   ,duplication, or modification of any portion is strictly prohibited.
//
// Disclaimer:
//
//   This VHDL/Verilog or C/C++ source code is intended as a design reference
//   which illustrates how these types of functions can be implemented.
//   It is the user's responsibility to verify their design for
//   consistency and functionality through the use of formal
//   verification methods.  Terasic provides no warranty regarding the use 
//   or functionality of this code.
//
// --------------------------------------------------------------------
//           
//                     Terasic Technologies Inc
//                     356 Fu-Shin E. Rd Sec. 1. JhuBei City,
//                     HsinChu County, Taiwan
//                     302
//
//                     web: http://www.terasic.com/
//                     email: support@terasic.com
//
// --------------------------------------------------------------------

#include "isp1761_config.h"
#include "isp1761_hal_nios2.h"
#include "isp1761_host_register.h"

bool ISP1716_Init(void){
    bool bSuccess = TRUE;
    int i;
    alt_u32 data32, read32;    
    
    //===============================================
    // hardware reset
    IOWR(USB_RESET_N_BASE, 0, 1);
    msleep(50); //0703/2008, add
    IOWR(USB_RESET_N_BASE, 0, 0);
    msleep(50);  //0703/2008, change delay from 10ms to 50 ms
    IOWR(USB_RESET_N_BASE, 0, 1); // alwasy pull-high after reset
    msleep(50);   //0703/2008, change delay from 5ms to 50 ms   
    
    //===============================================
    // set bus width
#ifdef DATA_BUS_16BIT_WIDTH
    //???
#else    
    HAL1761_RegWrite32(0x300 /* HW_MODE_REG */, 0x00000125); // 32-bit mode
    HAL1761_RegWrite32(0x300 /* HW_MODE_REG */, 0x80000125);
    msleep(15);
    HAL1761_RegWrite32(0x300 /* HW_MODE_REG */, 0x00000125);
#endif //DATA_BUS_16BIT_WIDTH       

    //============ SCRATCH Register read/write test ===========
    for(i=0;i<512 && bSuccess;i+=13){
        data32 = i;
        HAL1761_RegWrite32(HC_SCRATCH_REG, data32);
        read32 = HAL1761_RegRead32(HC_SCRATCH_REG);
        if (read32 != data32)
            bSuccess = FALSE;
            //printf("usb scratch test fail, read=%08Xh, expected=%08Xh\n", read32, data32);
    }    
    if (!bSuccess)
        return bSuccess;
    
    //===============================================
    // config port1
#ifdef PORT1_CONFIG_AS_DEVICE
    // config port1 as device
    HAL1761_RegWrite32(0x374 /* OTG_CONTROL */,0x00000081);
    HAL1761_RegWrite32(0x374 /* OTG_CONTROL */,0x00160000);    
    
    HAL1761_RegWrite32(0x374 /* OTG_CONTROL */,0xFFFF0000); /* clear all otg interrupt */
    HAL1761_RegWrite32(0x374 /* OTG_CONTROL */,0x00000481);
    
    //HAL1761_Write32(0x374 /* OTG_CONTROL */, 0x00000018);     
#else 
    // config port1 as host   
// 03/25/2008    HAL1761_RegWrite32(0x374 /* OTG_CONTROL */, 0x00000018); /* port1 led will light now */
    HAL1761_RegWrite32(0x374 /* OTG_CONTROL */, 0x00800018); /* port1 led will light now */
#endif    
     
     return bSuccess;
}

void ISP1716_HcDisableIrq(void){
    // disable all of irq
    alt_u32 data32;
    HAL1761_RegWrite32(HC_INTENABLE_REG, 0x00);
    data32 = HAL1761_RegRead32(HC_INTENABLE_REG);
}