/* astro_impl.h Private implementation details Warning: Not for general consumption. */ #ifndef __astro_impl_h__ #define __astro_impl_h__ #include /* This is the ID string stored in the FCode PROM */ /* At bootup/autoconfigure, the '|' causes problems */ /* so has been replaced in newer PROMS with ',' */ /* The identify routine should accept either one */ const char prom_id_string_one[] = "SDSU|astr"; const char prom_id_string_two[] = "astr"; const char prom_id_string_three[] = "SDSUastro"; /* Interface card device registers as they appear on the SBus */ /* register set #0 */ struct astro_regs { volatile long csr; /* control/status register */ volatile long ar; /* address register */ volatile long bcr; /* byte count register */ volatile long unused; /* actually used as a transmission register */ volatile long extra1; volatile long extra2; volatile long extra3; volatile long ww; /* word width register */ }; /* register set #1 */ struct Dchan_regs { volatile u_long dr[256]; }; /* register set #2 */ struct Echan_regs { volatile u_short er[1024]; }; /* LSI DMAC+ (L64853A) control/status register (csr) bits (in all cases: true = 1, false = 0) 0: ro interrupt pending 1: ro error pending 2: ro draining 3: ro draining 4: rw interrupt enable 5: wo flush buffer 6: rw slave error 7: rw reset dma 8: rw memory read/write 9: rw enable dma 10--12: ro unused == 0 13: rw enable counter 14: ro terminal count 15: rw reserved (always write 0 to this bit) 16--19: ro unused == 0 20: rw address latch enable/address strobe 21: ro lance error 22: rw faster 23: rw tc interrupt disable 24: rw enable next 25: ro dma on 26: ro address loaded 27: ro next address loaded 28--31: ro device id == 1001 (ro = read only, rw = read or write, wo = write only) */ const u_long dmac_int_pend = 0x00000001; const u_long dmac_err_pend = 0x00000002; const u_long dmac_draining = 0x0000000c; const u_long dmac_int_en = 0x00000010; const u_long dmac_flush = 0x00000020; const u_long dmac_slave_err = 0x00000040; const u_long dmac_reset = 0x00000080; const u_long dmac_write = 0x00000100; const u_long dmac_en_dma = 0x00000200; const u_long dmac_en_cnt = 0x00002000; const u_long dmac_tc = 0x00004000; const u_long dmac_ale_as = 0x00100000; const u_long dmac_faster = 0x00400000; const u_long dmac_tci_dis = 0x00800000; const u_long dmac_en_next = 0x01000000; const u_long dmac_dma_on = 0x02000000; const u_long dmac_a_loaded = 0x04000000; const u_long dmac_na_loaded = 0x08000000; #define NUMBUFS 10 /* Image buffer */ struct image_buf { ddi_dma_cookie_t buf_cookie; ddi_dma_handle_t buf_handle; }; /* Driver state structure. All state variables related to the state of the driver are kept in here. */ struct astro_state { dev_info_t *dip; /* pointer to devices dev_info node */ struct astro_regs *regp; /* register set #0 */ struct Dchan_regs *dchan; struct Echan_regs *echan; volatile int open; /* flag set when driver opened */ /* interrupt control `cookie's */ ddi_iblock_cookie_t iblock_cookie; ddi_idevice_cookie_t idevice_cookie; /* dma buffers */ struct buf *bp; ddi_dma_handle_t handle; struct image_buf image_buf[NUMBUFS]; struct dev_info *devinfo_p; /* pointer to devices dev_info node */ struct proc *p_proc; struct buf buf[NUMBUFS]; /* dma buffer structs */ int saved_spl; int interrupt_pri; int interrupt_pri_crit; int nextbuf; /* Next DMA buf, if <> curbuf. */ int curbuf; /* current DMA buf ptr. */ int chainbuf; /* flag that LSI 64853A chaining in use */ int timeout; /* in ticks = 1/100th's */ int def_timeout; /* timeout value on open or after ioctl read*/ int timeout_id; u_char open_excl; /* lock for exclusive open */ u_char open_inhibit; u_char io_in_progress; /* set when transfers in progress */ u_char timeout_active; /* set when timeout has been made */ u_char had_timeout; /* set when timeout has expired */ u_char had_terminate; /* set when premature termination */ /* thread locking and synchronization */ kmutex_t mu; /* mutual exclusion lock */ kcondvar_t cv; /* synchronization condition variable */ kcondvar_t bufcv; /* image_buf synchronization condition variable */ unsigned int ddic; /* critical region cookie */ }; /* dma engine limitations */ static ddi_dma_lim_t dma_limits = { 0x00000000, /* low address */ 0xffffffff, /* high address */ 0x00ffffff, /* maximum counter value */ 0x17, /* burst sizes 1, 2, 4, 16 */ 0x1, /* minimum effective transfer size */ 0, /* ? */ /* average speed KBytes/s */ }; const int astro_max_dma = 0xffffff; /* Time out a transfer if no dma interrupt occurrs within this time. */ /* Must be at least long enough to transfer minphys bytes. The timer */ /* is restarted for each new block during a large transfer. */ const int dma_read_timeout_usec = 30000000; /* 6.0 secs */ const int image_buf_size = 64512; const int image_buf_error = 0; const int image_buf_done = 1; const int image_buf_ready = 2; const int image_buf_busy = 3; const int image_buf_waiting = 4; /* Definitions of the errors occurred during the data transfer */ #define device_not_busy 5 #define data_trans_error 6 #define image_buf_not_busy 7 #define timed_out 8 #define bad_interrupt 9 #define tdl_size 8 volatile u_long readback; /* macros from v1.0 (for backward compatibility) */ #define DMAIO_COUNT_ENABLE 0X00002000 /* 1 = enable Byte Counter, 0 = disable */ #define DMAIO_DMA_ENABLE 0X00000200 /* 1 = enable DMA operation */ #define DMAIO_DMA_RW 0X00000100 /* 1 = Write memory 0 = Read memory */ #define DMAIO_DEV_RESET 0X00000080 /* 1 = enable, 0 = disable */ #define DMAIO_DRAIN_BFR 0X00000040 /* 1 = Write back and clear, bit resets itself */ #define DMAIO_FLUSH_BFR 0X00000020 /* 1 = Reset Pack Count, Err Pending and TC bits */ #define DMAIO_INT_ENABLE 0X00000010 /* 1 = enable, 0 = disable */ #define DMAIO_TC 0X00004000 /* 1 = TC Reached */ #define DMAIO_PACK_ADR 0X00001800 /* 1 = marks the two bit address */ #define DMAIO_REQ_PEND 0X00000400 /* 1 = Active DMA request */ #define DMAIO_PACK_COUNT 0X0000000c /* 1 = marks the two bit count */ #define DMAIO_ERR_PENDING 0X00000002 /* 1 = Active, clears on read */ #define DMAIO_INT_PENDING 0X00000001 /* 1 = Active, clears on read */ #define DMAIO_FASTER 0X00400000 /* 1 = Faster, 0 = Not as fast */ #endif /* !__astro_impl_h__ */